S9S12HY64J0CLL NXP
| Available |
S9S12HY64J0CLL NXP
On-chip modules available within the family include the following features:
• S12 CPU core
• Maximum 64 MHz core freqency, 32 MHz bus frequency
• Up to 64 KB on-chip flash with ECC
• 4 KB data flash with ECC
• Up to 4 KB on-chip SRAM
• Phase locked loop (IPLL) frequency multiplier with internal filter
• 4–16 MHz amplitude controlled Pierce oscillator
• 1 MHz internal RC oscillator
• Two timer modules (TIM0 and TIM1) supporting input/output channels that provide a range of 16- bit input capture, output compare, counter and pulse accumulator functions
• Pulse width modulation (PWM) module with up to 8 x 8-bit channels
• Up to 8-channel, 10-bit resolution successive approximation analog-to-digital converter (ATD)
• Up to 40x4 LCD driver
• PWM motor controller (MC) with up to 16 high current drivers
• Output slew rate control on Motor driver pad
• One serial peripheral interface (SPI) module
• One Inter-IC bus interface (IIC) module
• One serial communication interface (SCI) module supporting LIN communications
• One multi-scalable controller area network (MSCAN) module (supporting CAN protocol 2.0A/B)
• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
• Autonomous periodic interrupt (API)
• Up to 22 key wakeup inputs
On-chip modules available within the family include the following features:
• S12 CPU core
• Maximum 64 MHz core freqency, 32 MHz bus frequency
• Up to 64 KB on-chip flash with ECC
• 4 KB data flash with ECC
• Up to 4 KB on-chip SRAM
• Phase locked loop (IPLL) frequency multiplier with internal filter
• 4–16 MHz amplitude controlled Pierce oscillator
• 1 MHz internal RC oscillator
• Two timer modules (TIM0 and TIM1) supporting input/output channels that provide a range of 16- bit input capture, output compare, counter and pulse accumulator functions
• Pulse width modulation (PWM) module with up to 8 x 8-bit channels
• Up to 8-channel, 10-bit resolution successive approximation analog-to-digital converter (ATD)
• Up to 40x4 LCD driver
• PWM motor controller (MC) with up to 16 high current drivers
• Output slew rate control on Motor driver pad
• One serial peripheral interface (SPI) module
• One Inter-IC bus interface (IIC) module
• One serial communication interface (SCI) module supporting LIN communications
• One multi-scalable controller area network (MSCAN) module (supporting CAN protocol 2.0A/B)
• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
• Autonomous periodic interrupt (API)
• Up to 22 key wakeup inputs
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