S912ZVLA12F0MLF NXP
Available
S912ZVLA12F0MLF NXP
• S12Z CPU core • 128, 96, 64, 32, 16 or 8 KB on-chip flash with ECC
• 2048, 1024, 128 byte EEPROM with ECC
• 8192, 4096, 1024 or 512 byte on-chip SRAM with ECC
• Phase locked loop (IPLL) frequency multiplier with internal filter
• 1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range
• 4-20 MHz amplitude controlled pierce oscillator
• Internal COP (watchdog) module
• analog-to-digital converter (ADC) with 10 -bit or 12 -bit resolution and up to 10 channels available on external pins and Vbg (bandgap) result reference
• PGA module with two input channels
• One 8-bit 5V digital-to-analog converter (DAC)
• One analog comparators (ACMP) with rail-to-rail inputs
• MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module
• One serial peripheral interface (SPI) module
• One serial communication interface (SCI) module with interface to internal LIN physical layer transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)
• Up to one additional SCI (not connected to LIN physical layer)
• One on-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard
• 6-channel timer module (TIM0) with input capture/output compare
• 2-channel timer module (TIM1) with input capture/output compare
• Inter-IC (IIC) module
• 8-channel Pulse Width Modulation module (PWM)
• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
• Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode
• Pins to support 25 mA drive strength to VSSX
• Pin to support 20 mA drive strength from VDDX (EVDD)
• High Voltage Input (HVI)
• Supply voltage sense with low battery warning
• On-chip temperature sensor, temperature value can be measured with ADC or can generate a high temperature warning
• Up to 23 pins can be used as keyboard wake-up interrupt (KWI)
• S12Z CPU core • 128, 96, 64, 32, 16 or 8 KB on-chip flash with ECC
• 2048, 1024, 128 byte EEPROM with ECC
• 8192, 4096, 1024 or 512 byte on-chip SRAM with ECC
• Phase locked loop (IPLL) frequency multiplier with internal filter
• 1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range
• 4-20 MHz amplitude controlled pierce oscillator
• Internal COP (watchdog) module
• analog-to-digital converter (ADC) with 10 -bit or 12 -bit resolution and up to 10 channels available on external pins and Vbg (bandgap) result reference
• PGA module with two input channels
• One 8-bit 5V digital-to-analog converter (DAC)
• One analog comparators (ACMP) with rail-to-rail inputs
• MSCAN (1 Mbit/s, CAN 2.0 A, B software compatible) module
• One serial peripheral interface (SPI) module
• One serial communication interface (SCI) module with interface to internal LIN physical layer transceiver (with RX connected to a timer channel for frequency calibration purposes, if desired)
• Up to one additional SCI (not connected to LIN physical layer)
• One on-chip LIN physical layer transceiver fully compliant with the LIN 2.2 standard
• 6-channel timer module (TIM0) with input capture/output compare
• 2-channel timer module (TIM1) with input capture/output compare
• Inter-IC (IIC) module
• 8-channel Pulse Width Modulation module (PWM)
• On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
• Autonomous periodic interrupt (API), supports cyclic wakeup from Stop mode
• Pins to support 25 mA drive strength to VSSX
• Pin to support 20 mA drive strength from VDDX (EVDD)
• High Voltage Input (HVI)
• Supply voltage sense with low battery warning
• On-chip temperature sensor, temperature value can be measured with ADC or can generate a high temperature warning
• Up to 23 pins can be used as keyboard wake-up interrupt (KWI)
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