AD9637BCPZ-80 ADI
Available
AD9637BCPZ-80 ADI
Low power: 60 mW per channel at 80 MSPS with scalable power options SNR = 71.5 dBFS (to Nyquist) SFDR = 92 dBc (to Nyquist) DNL = ±0.4 LSB (typical), INL = ±0.5 LSB (typical) Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3) Data and frame clock outputs 650 MHz full power analog bandwidth 2 V p-p differential input voltage range 1.8 V supply operation Serial port control Full chip and individual channel power-down modes Flexible bit orientation Built-in and custom digital test pattern generation Programmable clock and data alignment Programmable output resolution Standby mode
Low power: 60 mW per channel at 80 MSPS with scalable power options SNR = 71.5 dBFS (to Nyquist) SFDR = 92 dBc (to Nyquist) DNL = ±0.4 LSB (typical), INL = ±0.5 LSB (typical) Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3) Data and frame clock outputs 650 MHz full power analog bandwidth 2 V p-p differential input voltage range 1.8 V supply operation Serial port control Full chip and individual channel power-down modes Flexible bit orientation Built-in and custom digital test pattern generation Programmable clock and data alignment Programmable output resolution Standby mode
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