Description
74HC573PW-Q100
Product Description
The 74HC573PW-Q100 is a high-speed Si-gate CMOS device designed for high-performance applications. It is an octal D-type transparent latch with a 3-state output. The device features eight latches with separate D-type inputs for each latch and a common latch enable (LE) input, a common output enable (OE) input, and eight 3-state outputs.
Features
- Octal D-type transparent latch with 3-state outputs
- Complies with JEDEC standard JESD7B and has 100% latch-up testing
- Input levels:
- For CMOS: 0.5V to 1.5V (Vih), -0.5V to 0.5V (Vil)
- For TTL: 2.0V to Vcc (Vih), 0V to 0.8V (Vil)
- Output drive capability: 15mA (IOH), 15mA (IOL) for Vcc = 4.5V
- Power dissipation (PD): 80 μW (typical) at Vcc = 5V, Tamb = 25°C
- Latch enable (LE) input: Latches data when high
- Output enable (OE) input: Enables outputs when low
- Package: TSSOP20 (PW)
Functional Description
The 74HC573PW-Q100 has an octal latch configuration. Data at the D-inputs is stored in the latch when LE is high. The stored data appears at the outputs when LE is low and OE is low. When OE is high, the outputs are in the high-impedance state.
Specifications
- Operating temperature range: -40°C to 125°C
- Supply voltage (Vcc): 2.0V to 6.0V
- input voltage (Vi): -0.5V to Vcc + 0.5V
- output voltage (Vo): -0.5V to Vcc + 0.5V
- DC input diode current (IIK): ±20mA
- DC output diode current (IOK): ±20mA
- DC output current (IO): ±35mA
- DC Vcc or GND current: ±70mA
Package Information
- Package type: TSSOP20 (PW)
- Package version: ROHS
- Body width (mm): 4.5
- Lead count: 20
- Mounting: SMD (Surface Mount Device)
Reliability
- MSL (Moisture Sensitivity Level): MSL 3 (168 hours)
- ESD (Electrostatic Discharge) sensitivity: HBM JESD22-C101: exceeds 2000V, MM JESD22-C101: exceeds 200V
Ordering Information
- Product name: 74HC573PW-Q100
Note: For the most current data, visit the manufacturer’s website or consult the latest datasheet.